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FPU

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Displays the contents of the Floating-point Unit and SSE registers in the CPU.

Item Description

Instruction Pointer (IPTR)

Displays the Instruction Pointer (IPTR) address, opcode, operand (OPTR) address of the last floating-point instruction executed.

FPU Registers pane

Displays the floating-point register stack (ST0 through ST7) in ascending order. After the list, the control word, status word, and tag word are shown. The information displayed for each of the eight registers is shown as follows: Register name, register status, and register value.The register status can be one of the following values:

  • Empty Indicates that the register contains invalid data. When a register is empty, no value is displayed for that register, because the data in the register is presumed to be invalid.
  • Valid Indicates that the register contains nonzero valid data.
  • Spec. (Special) Indicates that the register contains valid data, but the valid data represents a special condition, either NAN (not a number), infinity, or a denormalized value.

The status of each register is determined by examining the tag word and the eleventh through thirteenth bits of the status word (top of stack indicator). When a register's status is not Empty, the value of the register in long double (extended) format is displayed immediately following the status. The registers can be displayed in different formats (other than long doubles).

The control, status, and tag words are displayed in hexadecimal format only. For these three words, any values that were altered by the last run operation are displayed in red.

Control Flags pane

Lists the control flags encoded in the control word. Any flags that were altered by the last run operation are displayed in red. The control flags and their bit number in the control word are as follows:

  • IM Invalid Operation Exception, 0
  • DM Denormalized Operation Exception Mask, 1
  • ZM Zero Divide Exception Mask, 2
  • OM Overflow Exception Mask, 3
  • UM Underflow Exception Mask, 4
  • PM Precision Exception Mask, 5
  • PC Precision Control, 8, 9
  • RC Rounding Control, 10, 11
  • IC Infinity Control (Obsolete), 12

Select any of the flags and right-click to change the flag's value. For single-bit flags, it changes the value from 0 to 1 or from 1 to 0. For multi-bit flags, it cycles through all possible values.

Status Flags pane

Lists the status flags encoded in the status word. Any flags that were altered by the last run operation are displayed in red. The flags and their bit number in the control word are as follows:

  • IE Invalid Operation Exception, 0
  • DE Denormalized Operation Exception, 1
  • ZE Zero Divide Exception, 2
  • OE Overflow Exception, 3
  • UE Underflow Exception, 4
  • PE Precision Exception, 5
  • SF Stack Fault, 6
  • ES Error Summary Status, 7
  • C0 Condition Code 0 (CF), 8
  • C1 Condition Code 1, 9
  • C2 Condition Code 2 (PF), 10
  • ST Top of Stack, 11-13
  • C3 Condition Code 3 (ZF), 14
  • BF FPU Busy, 15

Select any of the flags and right-click to change the flag's value. For single-bit flags, it changes the value from 0 to 1 or from 1 to 0. For multi-bit flags, it cycles through all possible values.

SSE pane

Displays the Streaming SIMD Extensions (SSE) registers. Right-click the SSE pane and choose Display As to change the display format of the register content.

Figure: Comparing the x86 FPU Data Registers with the x64 SSE Data Registers

X86 FPU.pngX64 SSE.png

Context Menu

Right-click FPU window to display the following context menu commands.

Item Description

Zero

Sets the selected register's value to 0. When used on one of the seven FPU registers, this command also sets that register's tag bits in the tag word to 01 indicating that the register holds a zero value.

Empty

Sets the selected register's tag bits in the tag word to 11 indicating that the register is empty. This command is grayed out if the selected register is the CTRL word, STAT word, or TAG word.

Change

Displays the Change dialog, where you can enter a new value for the selected register. When used on one of the seven FPU registers, this command also sets that register's tag bits in the tag word to 00 indicating that the register holds a valid value.The value you enter in the Change dialog should match the format currently specified by the Display As menu item. For example, if the currently displayed format is Extended, you should enter an Extended value in the Change dialog.

Display As

Determines how the values in registers are displayed. The items on the submenu change depending on Show menu selection.

  • For FPU registers, the possible display types are Words and Extendeds (long doubles).
  • For MMX registers, the possible display types are Bytes, Words, DWords (double words), and QWords (quad words).
  • For SSE registers, the possible values are Bytes, Words, DWords (double words), QWords (quad words), DQWords (double quad words), Singles, and Doubles.

Radix

Available only when MMX registers are shown. Determines how the values in the MMX register are displayed. The possible values are Binary, Unsigned Decimal, Hexadecimal, and Signed Decimal.

Show

Toggles the FPU Registers pane between between FPU and MMX registers:

  • Floating Point Registers displays the 10-byte FPU registers ST(0) through ST(7). The registers can be viewed as either Extended (long double) values or as 5 DWord values.
  • MMX Registers displays the 8-byte MMX registers MM0 through MM7. The registers can be viewed as 8 Byte values, 4 Word values, 2 DWord values, or 1 QWord value. These values can be shown in either binary, decimal, or hexadecimal format (see Radix). MMX registers can only be shown on a computer that is MMX enabled.

Toggle Flag

In the Status Flags and Control Flags panes, changes the value of the selected flag. For single-bit flags, changes the value from 0 to 1 or from 1 to 0. For multi-bit flags, cycles through all possible values.

Stay on Top

Keeps the FPU view on top of other windows.

See Also

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